Datasheet
APPLICATIONS: GENERAL-PURPOSE INPUT
V
OUT
CH1
DV
DD
AV
DD
V
REF
V /2
S
(+2.5V)
V
S
(+5V)
CH0
V
IN0
200mV
PP
MUX
R
A
V
REF_ADC
R
B
R
X
PGA112
PGA113
G=1
0
+100mV
-100mV
+2.5V
+2.6V
+2.4V
+2.5V
+4.5V
+0.5V
V
OUT0
V
IN0
V
CH0
C
A
V
IN1
R
A
R
F
R
I
G=20
+
-
+4.9625V
+37.5mV
V
OUT1
PGA112 , , PGA113
PGA116 , PGA117
SBOS424B – MARCH 2008 – REVISED SEPTEMBER 2008 ............................................................................................................................................
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Table 12 summarizes the scaling resistor values for
SCALING R
A
, R
X
, and R
B
for different ADC Ref voltages.
V
REF_ADC
is the reference voltage used for the ADC
Figure 77 is an example application that
connected to the PGA112/PGA113 output. It is
demonstrates the flexibility of the PGA for
assumed the ADC input range is 0V to V
REF_ADC
. The
general-purpose input scaling. V
IN0
is a ± 100mV input
Bipolar Input to Single-Supply Scaling section gives
that is ac-coupled into CH0. The PGA112/PGA113 is
the algorithm to compute resistor values for
powered from a +5V supply voltage, V
S
, and
references not listed in Table 12 . As a general
configured with the V
REF
pin connected to V
S
/2
guideline, R
B
should be chosen such that the input
(+2.5V). V
CH0
is the ± 100mV input, level-shifted and
on-channel current multiplied by R
B
is less than or
centered on V
S
/2 (+2.5V). A gain of 20 is applied to
equal to the input offset voltage. This value ensures
CH0, and because of the PGA113 configuration, the
that the scaling network contributes no more error
output voltage at V
OUT
is ± 2V centered on V
S
/2
than the input offset voltage. Individual applications
(+2.5V).
may require other design trade-offs.
CH1 is set to G = 1; through a resistive divider and
scalar network, we can read ± 5V or 0V. This setting
provides bipolar to single-ended input scaling.
Figure 77. General-Purpose Input Scaling
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