Datasheet
1 2 3
4
5
6 7 8 9 10 11 12 13 14 1
5 16
Command U2
CS
SCLK
DOUT
DIN1
DOUT1
DIN2
D
aisy-Chain SPI Read, Mode = 1,1
17 18 19
20
21 22 23 24 25 26 27 28 29 30 31 32
Command U1
D
OUT Hi-Z Pulled Low by DIN Weak Pull-Down
C
ommand U2
CS
SCL
K
DOUT1
DIN2
DOUT2
DIN
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
DataByteU1
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
DataByteU2
DataByteU1
CS
DOUT
SCLK
DIN
MSP430
CS
SCLK
DIN1
DOUT1
U1
Hi-Z
CS
SCLK
DIN2
U2
PGA116/PGA117
PGA116/PGA117
DOUT2
0 1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
G3
CH0
0
0
0
0
0
0
0
0
G2
G1
G0
CH3
CH2
CH1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
G3
CH0
G2
G1
G0
CH3
CH2
CH1
G3
CH0
G2 G1
G0
CH3
CH2
CH1
PGA112 , , PGA113
PGA116 , PGA117
SBOS424B – MARCH 2008 – REVISED SEPTEMBER 2008 ............................................................................................................................................
www.ti.com
Figure 67. SPI Daisy-Chain Read Timing Diagram (Mode 1,1)
26 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated
Product Folder Link(s): PGA112 PGA113 PGA116 PGA117