Datasheet

PCM9211
SBAS495 –JUNE 2010 www.ti.com
Register 6Ch, AUX Output Port (AUXSCKO/AUXBCKO/AUXLRCKO/AUXDOUT) Source Setting
(Address: 6Ch, Write and Read)
DATA B7 B6 B5 B4 B3 B2 B1 B0
Reg Name RSV AOSSRC2 AOSSRC1 AOSSRC0 RSV AOPSRC2 AOPSRC1 AOPSRC0
Default Value 0 0 0 0 0 0 0 0
Memo
AOSSRC[2:0]: AUX Output Port, SCK Source Control
000: DIR/ADC automatic (DIR lock:DIR, DIR unlock:ADC) (default)
001: DIR
010: ADC
011: AUXIN0
100: AUXIN1
101: Reserved
110: Reserved
111: Reserved
AOPSRC[2:0]: AUX Output Port, BCK/LRCK/DATA Source Control
000: DIR/ADC automatic (DIR lock:DIR, DIR unlock:ADC) (default)
001: DIR
010: ADC
011: AUXIN0
100: AUXIN1
101: Reserved
110: Reserved
111: Reserved
This source control register is divided into two parts (MOSSRC and MOPSRC). This design allows some
additional functionality such as jitter cleaning. To clean the clock jitter of the HDMI receiver output, the HDMI
receiver S/PDIF output is connected to the PCM9211 S/PDIF input, and the HDMI receiver I
2
S outputs
(BCK/LRCK/DATA) are connected with the PCM9211 PCM input port.
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