Datasheet

PCM9211
www.ti.com SBAS495 –JUNE 2010
Register 60h, DIT Function Control 1/3
(Address: 60h, Write and Read)
DATA B7 B6 B5 B4 B3 B2 B1 B0
Reg Name RSV TXSSRC2 TXSSRC1 TXSSRC0 RSV TXPSRC2 TXPSRC1 TXPSRC0
Default Value 0 1 0 0 0 1 0 0
Memo
TXSSRC[2:0]: DIT System Clock Source Select
000: DIR/ADC Automatic (DIR lock = DIR, DIR unlock = ADC)
001: DIR
010: ADC
011: AUXIN0
100: AUXIN1 (default)
100: AUXIN2
110: Reserved
111: Reserved
TXPSRC[2:0]: DIT Bit Clock, LR Clock, Data Source Select
000: DIR/ADC Automatic (DIR lock = DIR, DIR unlock = ADC)
001: DIR
010: ADC
011: AUXIN0
100: AUXIN1 (default)
100: AUXIN2
110: Reserved
111: Reserved
Copyright © 2010, Texas Instruments Incorporated Submit Documentation Feedback 93
Product Folder Link(s): PCM9211