Datasheet

PCM9211
www.ti.com SBAS495 –JUNE 2010
Register 3Ch–3Dh, P
D
Buffer (Burst Preamble P
D
Output Register)
Address: 3Ch, Read-Only
DATA B7 B6 B5 B4 B3 B2 B1 B0
Reg Name PD7 PD6 PD5 PD4 PD3 PD2 PD1 PD0
Default Value N/A N/A N/A N/A N/A N/A N/A N/A
Memo
Address: 3Dh, Read-Only
DATA B7 B6 B5 B4 B3 B2 B1 B0
Reg Name PD15 PD14 PD13 PD12 PD11 PD10 PD9 PD8
Default Value N/A N/A N/A N/A N/A N/A N/A N/A
Memo
PD[15:0]: Burst Preamble P
D
, Length Code (Number of bits)
PD[15:0] is updated at the time when PC[15:0] is updated. PD[15:0] is never updated when only PC[15:0] is
updated. Register 2Ch/OPCRNW0 or Register 2Dh/OPCRNW1 inform the system that PC[15:0] is updated.
Register 40h, System Reset Control
(Address: 40h, Write and Read)
DATA B7 B6 B5 B4 B3 B2 B1 B0
Reg Name MRST SRST ADDIS RXDIS RSV RSV TXDIS XODIS
Default Value 1 1 0 0 0 0 0 0
Memo
MRST: Mode Control Register Reset for All Functions
0: Set default value
1: Normal operation (default)
SRST: System Reset for ADC
0: Reset
1: Normal operation (default)
To return the MRST, SRST bit to '0' is not necessary because the MRST, SRST bit is automatically
set to '1'.
ADDIS: Power Down for ADC
0: Normal operation (default)
1: Power down
SCK must be provided to disable ADC by ADDIS = 1.
RXDIS: Power Down for DIR
0: Normal operation (default)
1: Power down
TXDIS: Power Down for DIT
0: Normal operation (default)
1: Power down
XODIS: Power Down for OSC
0: Normal operation (default)
1: Power down
XODIS is superior to OSCAUTO.
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