Datasheet

PCM9211
SBAS495 –JUNE 2010 www.ti.com
Register 31h, XTI Source, Clock (SCK/BCK/LRCK) Frequency Setting
(Address: 31h, Write and Read)
DATA B7 B6 B5 B4 B3 B2 B1 B0
Reg Name RSV RSV XSCK1 XSCK0 XBCK1 XBCK0 XLRCK1 XLRCK0
Default Value 0 0 0 1 1 0 1 0
Memo
XSCK[1:0]: XTI Clock Source Frequency Setting
00: XTI/1 (24.576 MHz)
01: XTI/2 (12.288 MHz) (default)
10: XTI/4 (6.144 MHz)
11: XTI/8 (3.072 MHz)
XBCK[1:0]: XTI Clock Source BCK Frequency Setting
00: XTI/2 (12.288 MHz)
01: XTI/4 (6.144 MHz)
10: XTI/8 (3.072 MHz) (default)
11: XTI/16 (1.536 MHz)
XLRCK[1:0]: XTI Clock Source LRCK Frequency Setting
00: XTI/128 (192 kHz)
01: XTI/256 (96 kHz)
10: XTI/512 (48 kHz) (default)
11: XTI/1024 (24 kHz)
NOTE
The XTI clock source frequency is allowed to be set over the maximum limit of the ADC
allowable clock frequency. However, setting the XTI clock source frequency at such a
level is not recommended and may cause the device to exceed its stated operating and
performance limits.
78 Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated
Product Folder Link(s): PCM9211