Datasheet

PCM9211
www.ti.com SBAS495 –JUNE 2010
Register 2Bh, INT1 Output Cause Mask Setting
(Address: 2Bh, Write and Read)
DATA B7 B6 B5 B4 B3 B2 B1 B0
Reg Name MERROR1 MNPCM1 MEMPHF1 MDTSCD1 MCSRNW1 MPCRNW1 MFSCHG1 MADLVL1
Default Value 1 1 1 1 1 1 1 1
Memo
MERROR1: ERROR Port Output Status
0: Not masked
1: Masked (default)
MNPCM1: NPCM Port Output Status
0: Not masked
1: Masked (default)
This register setting follows the register setting of non-PCM data identification.
MEMPHF1: Emphasis Flag in Channel Status
0: Not masked
1: Masked (default)
MDTSCD1: DTS-CD/LD Sync Detection
0: Not masked
1: Masked (default)
This detection condition depends on the register setting for DTS-CD/LD detection conditions.
MCSRNW1: Channel Status Data of Beginning 48-bit Renewal
0: Not masked
1: Masked (default)
MPCRNW1: Burst Preamble P
C
Renewal
0: Not masked
1: Masked (default)
MFSCHG1: Renewal Flag of f
S
Calculator Result
0: Not masked
1: Masked (default)
MADLVL1: ADC Input Level Detection Status
0: Not masked
1: Masked (default)
Copyright © 2010, Texas Instruments Incorporated Submit Documentation Feedback 73
Product Folder Link(s): PCM9211