Datasheet

PCM9211
SBAS495 –JUNE 2010 www.ti.com
Typical Register Settings
Table 31 and Table 32 show the typical register settings for DSD format.
Table 31. DSD Inputs From MPIO_Cx Ports
REGISTER SETTINGS DESCRIPTIONS
34h = CFh RXSEL = TXOUT
61h = 14h TXDSD = Enable
6Bh = 14h MOSSRC = DIR
MOPSRC = AUXIN1
Table 32. DSD Inputs From MPIO_Bx Ports
REGISTER SETTINGS DESCRIPTIONS
34h = CFh RXSEL = TXOUT
60h = 55h TXSSRC = AUXIN2
TXPSRC = AUXIN2
61h = 14h TXDSD = Enable
6Bh = 14h MOSSRC = DIR
MOPSRC = AUXIN1
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