Datasheet

ADCCore
24
MainPort/MPIO
Matrix
DIRCore
SPI/I2C
ERROR
NPCM
EMPH
DTSCD
CSRNW
PCRNW
FSCHG
7
8
MainPort/
MPIOs
ERROR
NPCM
2
ERROR/INT0
NPCM/INT1
Level
Detector
INT
REG
ERROR/
NPCM
ADDTLV[1:0]
VINL
VINR
SPI/I C
2
Register2Dh_B0
NPCM/INT1pin
LVLDETFlag
ReadRegister2Dh
PCM9211
www.ti.com SBAS495 –JUNE 2010
ADC Level Detect and Interrupt
The PCM9211 has the ability to monitor audio inputs, which can be used to trigger interrupt outputs on port INT1.
The ADC has a level monitor that can be set so that INT1 can be triggered whenever a specific level (referenced
to 0dBFS) is crossed. A block diagram for this function is shown in Figure 18.
Figure 18. Block Diagram for ADC Level Detection
Operation of the level detect circuitry is shown in Figure 19. The ADC level detect is flagged when either ADC
channel goes high. The flag is cleared when Register 2Dh is read.
Figure 19. Operation of the ADC Level Detect Circuitry
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