Datasheet

PCM9211
www.ti.com SBAS495 –JUNE 2010
Table 1 shows the timing requirements to reset the device using the RST pin.
Table 1. Timing Requirements for RST Pin Device Reset
SYMBOL DESCRIPTION MIN TYP MAX UNITS
t
RSTL
RST pulse width (RST pin = low) 1 µs
The condition of each output pins during the device reset is shown in Table 2.
Table 2. Output Pin Condition During Reset
CLASSIFICATION PIN NAME AT RST = L
(1)
SCKO L
BCK L
Main Output Port
LRCK L
DOUT L
ERROR/INT0 H
Flag and Status
NPCM/INT1 L
MPIO_A0 through MPIO_A3 Hi-Z
MPIO_B0 through MPIO_B3 Hi-Z
MPIOs and MPOs
MPIO_C0 through MPIO_C3 Hi-Z
MPO0, MPO1 L
MDI/SDA Hi-Z
Serial I/F
MDO/ADR0 Hi-Z
Oscillation Circuit XTO Output
Common Supply for ADC VCOM Output
Coax Input RXIN0, RXIN1 H
(1) L = low, H = high, Hi-Z = high impedance.
PCM Audio Interface Format
Each of the modules in the PCM9211 (DIR, DIT, ADC, Aux I/Os) supports these four interface formats:
• 24-bit I
2
S format
• 24-bits Left-Justified format
• 24-bit Right-Justified format
• 16-bit Right-Justified format
32-bit interfaces are supported for the paths from AUXIN0/1/2 to MainPort/AUXOUT.
All formats are provided twos complement, MSB first. They are selectable through SPI-/I
2
C-accessible registers.
The specific control registers are:
• DIR: RXFMT[2:0]
• ADC: ADFMT[1:0]
• DIT: TXFMT[1:0]
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Product Folder Link(s): PCM9211