Datasheet

PCM9211
www.ti.com SBAS495 –JUNE 2010
Register 7Dh, GPIO Input Data Register for MPIO_A, MPIO_B
(Address: 7Dh, Read-Only)
DATA B7 B6 B5 B4 B3 B2 B1 B0
Reg Name GPIB3 GPIB2 GPIB1 GPIB0 GPIA3 GPIA2 GPIA1 GPIA0
Default Value N/A N/A N/A N/A N/A N/A N/A N/A
Memo
GPIB3: MPIO_B3 Pin, GPIO Input Data
0: Detect low level
1: Detect high level
GPIB2: MPIO_B2 Pin, GPIO Input Data
0: Detect low level
1: Detect high level
GPIB1: MPIO_B1 Pin, GPIO Input Data
0: Detect low level
1: Detect high level
GPIB0: MPIO_B0 Pin, GPIO Input Data
0: Detect low level
1: Detect high level
GPIA3: MPIO_A3 Pin, GPIO Input Data
0: Detect low level
1: Detect high level
GPIA2: MPIO_A2 Pin, GPIO Input Data
0: Detect low level
1: Detect high level
GPIA1: MPIO_A1 Pin, GPIO Input Data
0: Detect low level
1: Detect high level
GPIA0: MPIO_A0 Pin, GPIO Input Data
0: Detect low level
1: Detect high level
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