Datasheet

PCM9211
www.ti.com SBAS495 –JUNE 2010
Register 73h, MPIO_A3, MPIO_A0 Output Flag Select
(Address: 73h, Write and Read)
DATA B7 B6 B5 B4 B3 B2 B1 B0
Reg Name MPA3FLG3 MPA3FLG2 MPA3FLG1 MPA3FLG0 MPA2FLG3 MPA2FLG2 MPA2FLG1 MPA2FLG0
Default Value 0 0 0 0 0 0 0 0
Memo
MPA3FLG[3:0]: MPIO_A3 Pin, Flag Select
0000: CLKST (default)
0001: EMPH
0010: BPSYNC
0011: DTSCD
0100: PARITY
0101: LOCK
0110: VOUT
0111: UOUT
1000: COUT
1001: BFRAME
1010: FSOUT0
1011: FSOUT1
1100: FSOUT2
1101: FSOUT3
1110: INT0
1111: INT1
MPA2FLG[3:0]: MPIO_A2 Pin, Flag Select
0000: CLKST (default)
0001: EMPH
0010: BPSYNC
0011: DTSCD
0100: PARITY
0101: LOCK
0110: VOUT
0111: UOUT
1000: COUT
1001: BFRAME
1010: FSOUT0
1011: FSOUT1
1100: FSOUT2
1101: FSOUT3
1110: INT0
1111: INT1
These register settings are effective only at MPASEL[1:0] = '11', MPA3SEL = '0', and MPA2SEL = '0'.
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