Datasheet

PCM5141, PCM5142
SLAS759A –AUGUST 2012–REVISED SEPTEMBER 2012 www.ti.com
Table 54. I
2
C Bus Timing
SYMBOL PARAMETER CONDITIONS MIN MAX UNIT
Standard 100 kHz
f
SCL
SCL clock frequency
Fast 400 kHz
Standard 4.7
Bus free time between a STOP and START
t
BUF
µs
condition
Fast 1.3
Standard 4.7
t
LOW
Low period of the SCL clock µs
Fast 1.3
Standard 4.0 µs
t
HI
High period of the SCL clock
Fast 600 ns
Standard 4.7 µs
t
RS-SU
Setup time for (repeated)START condition
Fast 600 ns
t
S-HD
Standard 4.0 µs
Hold time for (repeated)START condition
t
RS-HD
Fast 600 ns
Standard 250
t
D-SU
Data setup time ns
Fast 100
Standard 0 900
t
D-HD
Data hold time ns
Fast 0 900
Standard 20 + 0.1C
B
1000
t
SCL-R
Rise time of SCL signal ns
Fast 20 + 0.1C
B
300
Standard 20 + 0.1C
B
1000
Rise time of SCL signal after a repeated START
t
SCL-R1
ns
condition and after an acknowledge bit
Fast 20 + 0.1C
B
300
Standard 20 + 0.1C
B
1000
t
SCL-F
Fall time of SCL signal ns
Fast 20 + 0.1C
B
300
Standard 20 + 0.1C
B
1000
t
SDA-R
Rise time of SDA signal ns
Fast 20 + 0.1C
B
300
Standard 20 + 0.1C
B
1000
t
SDA-F
Fall time of SDA signal ns
Fast 20 + 0.1C
B
300
Standard 4.0 µs
t
P-SU
Setup time for STOP condition
Fast 600 ns
C
B
Capacitive load for SDA and SCL line 400 pF
t
SP
Pulse width of spike suppressed Fast 50 ns
Noise margin at High level for each connected
V
NH
0.2V
DD
V
device (including hysteresis)
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