Datasheet

PCM5141, PCM5142
www.ti.com
SLAS759A AUGUST 2012REVISED SEPTEMBER 2012
RSV Reserved
Reserved. Do not access.
RCMF VCOM Reference Ramp Up
This bit controls the VCOM voltage ramp up speed.
Default value: 0
0: Normal ramp up, ~600ms with external capacitance = 1uF
1: Fast ramp up, ~3ms with external capacitance = 1uF
Page 1 / Register 9
Dec Hex b7 b6 b5 b4 b3 b2 b1 b0
9 09 RSV RSV RSV RSV RSV RSV RSV VCPD
Reset Value 1
RSV Reserved
Reserved. Do not access.
VCPD Power down control for VCOM
This bit controls VCOM powerdown switch.
Default value: 1
0: VCOM is powered on
1: VCOM is powered down
Page 44 / Register 1
Dec Hex b7 b6 b5 b4 b3 b2 b1 b0
1 01 RSV RSV RSV RSV ACRM AMDC ACRS ACSW
Reset Value 0 0
RSV Reserved
Reserved. Do not access.
ACRM Active CRAM Monitor (Read Only)
This bit indicates which CRAM is being accessed by the DSP when adaptive mode is disabled. When adaptive
mode is enabled, this bit has no meaning. 0: CRAM A is being used by the DSP
1: CRAM B is being used by the DSP
AMDC Adaptive Mode Control
This bit controls the DSP adaptive mode. When in adaptive mode, only CRAM A is accessible via serial
interface when the DSP is disabled (DAC in standby state), while when the DSP is enabled (DAC is run state)
the CRAM A can only be accessed by the DSP and the CRAM B can only be accessed by the serial interface,
or vice versa depending on the value of CRAMSTAT. When not in adaptive mode, both CRAM A and B can be
accessed by the serial interface when the DSP is disabled, but when the DSP is enabled, no CRAM can be
accessed by serial interface. The DSP can access either CRAM, which can be monitored at SWPMON.
Default value: 0
0: Adaptive mode disabled
1: Adaptive mode enabled
ACRS Active CRAM Selection (Read Only)
This bit indicates which CRAM currently serves as the active one. The other CRAM serves as an update buffer,
and can accessed by serial interface (SPI or I2C) 0: CRAM A is active and being used by the DSP
1: CRAM B is active and being used by the DSP
ACSW Switch Active CRAM
This bit is a role-switch request between the two buffers, switching the active buffer role between CRAM A and
CRAM B. This bit clears automatically when the switching process completed.
Default value: 0
0: No switching requested or switching completed
1: Switching is being requested
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