Datasheet

PCM5121, PCM5122

www.ti.com

SLAS763A –AUGUST 2012–REVISED SEPTEMBER 2012

00000000: offset = 0 BCK (no offset)

00000001: ofsset = 1 BCK

00000010: offset = 2 BCKs

11111111: offset = 256 BCKs

Page 0 / Register 42

Dec Hex b7 b6 b5 b4 b3 b2 b1 b0

42 2A RSV RSV AUPL1 AUPL0 RSV RSV AUPR1 AUPR0

Reset Value 0 1 0 1

RSV Reserved

Reserved. Do not access.

AUPL[1:0] Left DAC Data Path

These bits control the left channel audio data path connection.

Default value: 01

00: Zero data (mute)

01: Left channel data

10: Right channel data

11: Reserved (do not set)

AUPR[1:0] Right DAC Data Path

These bits control the right channel audio data path connection.

Default value: 01

00: Zero data (mute)

01: Right channel data

10: Left channel data

11: Reserved (do not set)

Page 0 / Register 43

Dec Hex b7 b6 b5 b4 b3 b2 b1 b0

43 2B RSV RSV RSV PSEL4 PSEL3 PSEL2 PSEL1 PSEL0

Reset Value 0 0 0 0 1

RSV Reserved

Reserved. Do not access.

PSEL[4:0] DSP Program Selection

These bits select the DSP program to use for audio processing.

Default value: 00001

00000: Reserved (do not set)

00001: 8x/4x/2x FIR interpolation filter with de-emphasis

00010: 8x/4x/2x Low latency IIR interpolation filter with de-emphasis

00011: High attenuation x8/x4/x2 interpolation filter with de-emphasis

00100: Reserved

00101: Fixed process flow with configurable parameters

00110: Reserved (do not set)

00111: 8x Ringing-less low latency FIR interpolation filter without de-emphasis

others: Reserved (do not set)

Product Folder Links: PCM5121 PCM5122