Datasheet

PCM5121, PCM5122
SLAS763A AUGUST 2012REVISED SEPTEMBER 2012
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Power Save Modes
The PCM512x offers two power-save modes; standby and power-down.
When a clock error (SCK, BCK, and LRCK) or clock halt is detected, the PCM512x automatically enters standby
mode. The DAC and line driver are also powered down. The device can also be placed in standby mode via
software command.
When BCK and LRCK remain at a low level for more than 1 second, the PCM512x automatically enters power-
down mode. Power-down mode disables the negative charge pump and bias/reference circuit, in addition to
those disabled in standby mode. The device can also be placed in power-down mode via software command.
The detection time of BCK and LRCK halt can be controlled by Page 0, Register 44, D(2:0).
When expected Audio clocks (SCK, BCK, LRCK) are applied to the PCM512x, the device starts its powerup
sequence automatically. The detection time for BCK and LRCK halt is programmable.
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