Datasheet

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LRCK
PCM4222 PCM4222
AudioDSP
or
Interface
AudioDSP
or
Interface
BCK
DATA
LRCK
BCK
DATA
MCKI MCLK MCKI MCLK
Master
Clock
Master
Clock
(a)SlaveMode(S/M=HI) (b)MasterMode(S/M=LO)
FSYNC
SCLK
DATA
FSYNC
SCLK
DATA
LeftChannel
(a)Left-JustifiedDataFormat
RightChannel
LRCK
BCK
DATA
DATA
MSB LSB LSBMSB
(b)I SDataFormat
2
1/f
S
LRCK
BCK
MSB LSB MSB LSB
PCM4222
SBAS399A – OCTOBER 2006 – REVISED MARCH 2007
Figure 41. Slave and Master Mode Operation
Figure 42. Left-Justified and I
2
S Data Formats
22
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