Datasheet

TYPICAL CONNECTIONS
AGND
VINR-
VINR+
VCC1
AGND
AGND
AGND
AGND
VCC2
VINL-
VINL+
1
2
3
4
PCM4220PFB
100nFto1 Fm
LeftChannel
AnalogInput
+4.0V
100nF
+
100 Fm
FromHost,Logic,
orManualControls
5
6
7
8
9
12
13
14
15
16
17
18
19
20
21
22
23
24
AGND
VCOML
REFGNDL
VREFL
PCMEN
HPFDR
HPFDL
FS0
FS1
DF
DGND
DGND
DGND
100 Fm
+
100nF
100nF
+
100 Fm
10
11
RightChannel
AnalogInput
VCOMR
REFGNDR
VREFR
DGND
FMT0
FMT1
OWL0
OWL1
DGND
S/M
OVFR
48
47
46
45
FromHost,Logic,
orManualControls
ToHostand/orClippingIndicators
FromHostorMasterReset
FromAudioMasterClockSource
Audio
DSPorHost
44
43
42
41
40
37
36
35
34
33
32
31
30
29
28
27
26
25
OVFL
RST
MCKI
LRCK
BCK
DATA
VDD
DGND
NC
NC
NC
SUB0
SUB1
100nF
+3.3V
+
100 Fm
39
38
100nF
+
100 Fm
100nFto1 Fm
RequiredonlyforTDMdataformats.
Thesepinsareignoredforallotherformats.
INPUT BUFFER CIRCUITS
PCM4220
SBAS407C DECEMBER 2006 REVISED AUGUST 2009 .............................................................................................................................................
www.ti.com
Figure 44 provides a typical connection diagram for the PCM4220. Recommended power-supply bypass and
reference filter capacitors are shown. These components should be located as close to the corresponding
PCM4220 package pins as physically possible. Larger power-supply bypass capacitors may be placed on the
bottom side of the printed circuit board (PCB). However, reference decoupling capacitors should be located on
the top side of the PCB to avoid issues with added via inductance.
As Figure 44 illustrates, the audio host device may be a digital signal processor (DSP), digital audio interface
transmitter (DIT), or a programmable logic device.
Figure 44. Typical Connections for PCM and DSD Output Modes
The PCM4220 is typically preceded in an application by an input buffer or preamplifier circuit. The input circuit is
required to perform anti-aliasing filtering, in addition to application-specific analog gain scaling, limiting, or
processing that may be needed. At a minimum, first-order, low-pass anti-aliasing filtering is necessary. The input
buffer must be able to perform the input filtering requirement, in addition to driving the switched-capacitor inputs
of the PCM4220 device. The buffer must have adequate bandwidth, slew rate, settling time, and output drive
capability to perform these tasks.
Figure 45 illustrates the input buffer/filter circuit utilized on the PCM4222EVM evaluation module , where the
PCM4222 analog input section is identical to the PCM4220. This circuit has been optimized for measurement
purposes, so that it does not degrade the dynamic characteristics of the PCM4220. The resistors are primarily
0.1% metal film. The 40.2 resistor is 1% tolerance thick film. The 1nF and 2.7nF capacitors may be either PPS
24 Submit Documentation Feedback Copyright © 2006 2009, Texas Instruments Incorporated
Product Folder Link(s): PCM4220