Datasheet

$%
SBAS327A − JUNE 2004 − REVISED SEPTEMBER 2004
www.ti.com
26
DSDCLK
DSD1
DSD2
DSD3
DSD4
24
25
26
27
28
1
2
V
IN
1−
V
IN
1+
V
REF
12−
V
IN
2−
V
IN
3−
V
REF
34−
V
IN
4−
PCM4204
A1
48
47
A4
Analog
Inputs
+
0.1µF
33
µ
F
+3.3VD
+
0.1µF
33µF
+
0.1µF
33µF
55
54
A3
59
58
A2
DSD Data
Storage or
Processing
100Ω
15
29
30
31
32
SCKI
BCK
LRCK
SDOUT1
SDOUT2
PCM Audio
to
DSP, DIT, etc.
Master
Clock
100Ω
CONTROL
via
Logic, µP, etc.
10
11
12
13
14
17
18
19
20
34
35
36
37
38
39
RST
TEST
FS0
FS1
FS2
S/M
FMT0
FMT1
FMT2
CLIP1
CLIP2
CLIP3
CLIP4
HPFD
SUB
9
8
VDD1
DGND1
23
22
VDD2
DGND2
40
41
VDD3
DGND3
7
16
33
42
BGND1
BGND2
BGND3
BGND4
+
0.1µF
+
0.1µF
33µF
33µF
3
4
21
45
46
53
56
57
60
NC
NC
NC
NC
NC
NC
NC
NC
NC
5
6
+
+
33µF
0.1µF
52
51
50
49
0.1µF
0.1µF
33µF
64
63
62
V
IN
4+
V
IN
3+
V
IN
2+
VCC1
AGND1
V
COM
34
AGND3
V
REF
34+
V
REF
12+
AGND4
V
COM
12
61
44
43
VCC2
AGND2
+5VA
0.1µF
A1 through A4 are analog input buffers.
Refer to Figure 16 for an example circuit.
All capacitor values are in microfarads (µF).
The 0.1µF caps are X7R ceramic chip type.
The 33
µ
F caps are Low ESR tantalum or
X7R multi−layer ceramic chip type.
Figure 15. Typical Connection Diagram