Datasheet

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SBAS290B − JULY 2003 − SEPTEMBER 2004
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14
SCKI
t
SCKI
t
SCKIH
t
SCKIL
PARAMETER
DESCRIPTION
MIN MAX UNITS
System Clock Period 26 ns
t
SCKIH
System Clock High Pulse Time 12 ns
t
SCKIL
System Clock Low Pulse Time 12 ns
t
SCKI
Figure 2. System Clock Timing Requirements
SAMPLING MODES
The PCM4202 may be operated in one of three PCM
sampling modes, or at one of two DSD output data rates.
The PCM sampling modes are referred to as Single Rate,
Dual Rate, and Quad Rate.
Single Rate mode is utilized for sampling rates up to
54kHz. The delta-sigma modulator oversamples the
analog input signal by a rate equal to 128 times the desired
output sampling rate.
Dual Rate mode is utilized for sampling rates higher than
54kHz and up to 108kHz. The delta-sigma modulator
oversamples the analog input signal by a rate equal to 64
times the desired output sampling rate.
Quad Rate mode is utilized for sampling frequencies
higher than 108kHz and up to 216kHz. The delta-sigma
modulator oversamples the analog input signal by a rate
equal to 32 times the desired output sampling rate.
For DSD output data, the user may select either 64f
S
or
128f
S
oversampled data rates, where f
S
is the base
sampling rate, which is 44.1kHz for Super Audio CD
(SACD) applications. The 64f
S
data rate is analogous to
the Dual Rate PCM sampling mode, where the analog
input signal is oversampled by a rate equal to 64 times the
base sampling rate. The 128f
S
data rate corresponds to
the Single Rate PCM sampling mode, where the analog
input signal is oversampled by a rate equal to 128 times the
base sampling rate.
Table 1 indicates the sampling mode utilized for common
system clock and sampling rate combinations. The FS0
(pin 9), FS1 (pin 10), and FS2 (pin 11) inputs are utilized
to select the sampling mode for the PCM4202. If the state
of the sampling mode pins is changed any time after
power-up reset initialization, the user should issue an
external forced reset to re-initialize the PCM4202. Table 2,
Table 3, and Table 4 indicate the sampling mode
selections for PCM Master and Slave mode operation, as
well as the DSD Output mode.
Table 2. Sampling Mode Selection for PCM
Master Mode Operation
FS2 FS1 FS0
SAMPLING MODE WITH
SYSTEM CLOCK RATE
0 0 0 Single Rate with f
SCKI
= 768f
S
0 0 1 Single Rate with f
SCKI
= 512f
S
0 1 0 Single Rate with f
SCKI
= 384f
S
0 1 1 Single Rate with f
SCKI
= 256f
S
1 0 0 Dual Rate with f
SCKI
= 384f
S
1 0 1 Dual Rate with f
SCKI
= 256f
S
1 1 0 Quad Rate with f
SCKI
= 192f
S
1 1 1 Quad Rate with f
SCKI
= 128f
S
Table 3. Sampling Mode Selection for PCM Slave
Mode Operation
FS2 FS1 FS0 SAMPLING MODE
0 0 0 Single Rate with Clock Auto-Detection
0 0 1 Dual Rate with Clock Auto-Detection
0 1 0 Quad Rate with Clock Auto-Detection
0 1 1 Reserved
1 0 0 Reserved
1 0 1 Reserved
1 1 0 Reserved
1 1 1 Reserved