Datasheet

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SBAS291C − AUGUST 2003 − REVISED DECEMBER 2004
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20
MSB LSB MSB LSB
MSB LSB MSB LSB
LSBMSB LSBMSB
LRCK
BCK
DATA0
DATA1
LRCK
BCK
DATA0
DATA1
LRCK
BCK
DATA0
DATA1
(a)Left−JustifiedDataFormat
(b) Right−Justified Data Format
(c) I
2
SDataFormat
1/f
S
Ch.1(DATA0)orCh.3(DATA1) Ch.2(DATA0)orCh.4(DATA1)
Figure 10. Left Justified, Right Justified, and I
2
S Data Formats
LRCK
BCK
(BCKE = 0)
DATA0
DATA1
t
DS
t
DH
t
BKLRD
BCK
(BCKE = 1)
t
LRBKD
t
BCKP
t
BCKHL
PARAMETER
DESCRIPTION MIN MAX UNITS
70 ns
30 ns
10 ns
10 ns
10 ns
10 ns
50 %
BCK Cycle Time
BCK High/Low Time
LRCK Edge to BCK Sampling Edge Delay
BCK Sampling Edge to LRCK Edge Delay
Data Setup Time
Data Hold Time
LRCK Duty Cycle
t
BCKP
t
BCKHL
t
LRBKD
t
BKLRD
t
DS
t
DH
−
Figure 11. Audio Serial Port Timing for Left Justified, Right Justified, and I
2
S Data Formats.