Datasheet

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SBAS291C − AUGUST 2003 − REVISED DECEMBER 2004
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17
1024 System Clock Periods
Required for Initialization
System Clock
Indeterminate
or Inactive
SCKI
~2.0V
~4.0V
0V
0V
0V
0V
Internal
Reset
V
CC
1
V
CC
2
V
DD
Figure 5. Power-Up Reset Timing
1024 System Clock Periods
Required for Initialization
SCKI
Internal
Reset
0V
0V
0V
t
RSTL
>40ns
RST
Figure 6. External Reset Timing
Internal
Reset
Analog
Outputs
Outputs are On
Outputs are Muted
for 1024 SCKI Periods
Outputs are OnOutputs are Muted
Initialization
Period
HI
LO
Figure 7. Analog Output State for Reset Operations