Datasheet

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SBAS291C − AUGUST 2003 − REVISED DECEMBER 2004
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between the corresponding high and low reference pins.
An X7R ceramic chip capacitor is recommended for this
purpose. In some cases, a larger capacitor may need to be
placed in parallel with the 0.01µF capacitor, with the value
of the larger capacitor being dependent upon the
low-frequency power-supply noise present in the system.
Typical values may range from 1µF to 10µF. Low ESR
tantalum or multilayer ceramic chip capacitors are
recommended. Figure 3 illustrates the recommended
connections for the reference pins.
(1) Capacitor(s) required for each of the four reference pairs.
V
REF
+
(1)
V
COM
1
0.01
µ
F
0.1
µ
F
0.1
µ
F
0.1
µ
Fto10
µ
F
V
CC
V
COM
2
V
REF
−
(1)
Figure 3. Recommended Connections for Voltage
Reference and Common-Mode Output Pins
In addition to the reference pins, there are two
common-mode voltage output pins, V
COM
1 (pin 48) and
V
COM
2 (pin 37). These pins are nominally set to a value
equal to V
CC
/2 by internal voltage dividers. The V
COM
1 pin
is common to both Channels 1 and 2, while the V
COM
2 pin
is common to Channels 3 and 4. A 0.1µF X7R ceramic chip
capacitor should be connected between the
common-mode output pin and analog ground. The
common-mode outputs are used primarily to bias external
output circuitry.
SAMPLING MODES
The PCM4104 can operate in one of three sampling
modes: Single Rate, Dual Rate, or Quad Rate. Sampling
modes are selected by using the FS[1:0] bits in Control
Register 6
in Software mode, or by using the FS0 (pin 28)
and FS1 (pin 29) inputs in Standalone mode.
The Single Rate mode allows sampling frequencies up to
and including 54kHz. The D/A converter performs 128x
oversampling of the input data in Single Rate mode.
The Dual Rate mode allows sampling frequencies greater
than 54kHz, up to and including 108kHz. The D/A
converter performs 64x oversampling of the input data in
Dual Rate mode.
The Quad Rate mode allows sampling frequencies greater
than 108kHz, up to and including 216kHz. The D/A
converter performs 32x oversampling of the input data in
Quad Rate mode.
Refer to Table 1 for examples of system clock
requirements for common sampling frequencies.
SYSTEM CLOCK REQUIREMENTS
The PCM4104 requires a system clock, applied at the
SCKI (pin 14) input. The system clock operates at an
integer multiple of the input sampling frequency, or f
S
. The
multiples supported include 128f
S
, 192f
S
, 256f
S
, 384f
S
,
512f
S
, or 768f
S
. The system clock frequency is dependent
upon the sampling mode. Table 1 shows the required
system clock frequencies for common audio sampling
frequencies. Figure 4 shows the system clock timing
requirements.
Although the architecture of the PCM4104 is tolerant to
phase jitter on the system clock, it is recommended that
the user provide a low jitter clock (100 picoseconds or less)
for optimal performance.
Table 1. Sampling Modes and System Clock Frequencies for Common Audio Sampling Rates
SAMPLING MODE SAMPLING FREQUENCY, f
S
(kHz)
SYSTEM CLOCK FREQUENCY (MHz)
S
(kHz)
128f
S
192f
S
256f
S
384f
S
512f
S
768f
S
Single Rate 32 n/a n/a 8.192 12.288 16.384 24.576
Single Rate 44.1 n/a n/a 11.2896 16.9344 22.5792 33.8688
Single Rate 48 n/a n/a 12.288 18.432 24.576 36.864
Dual Rate 88.2 n/a n/a 22.5792 33.8688 n/a n/a
Dual Rate 96 n/a n/a 24.576 36.864 n/a n/a
Quad Rate 176.4 22.5792 33.8688 n/a n/a n/a n/a
Quad Rate 192 24.576 36.864 n/a n/a n/a n/a