Datasheet

PCM3168A
PCM3168A-Q1
SBAS452 – SEPTEMBER 2008 ......................................................................................................................................................................................... www.ti.com
DEC HEX B7 B6 B5 B4 B3 B2 B1 B0
82 52 — PSVAD2 PSVAD1 PSVAD0 — BYP2 BYP1 BYP0
PSVAD[2:0] ADC Power-save control
These bits control the ADC power-save mode. In power-save mode, DOUT is forced into ZERO
with a fade-out sequence, the internal ADC data are reset, and the ADC goes into a power-down
state. For power-save mode release, a fade-in sequence is applied on DOUT in resume process.
The serial mode control is enabled during this mode. Wait times greater than t
ADCDLY2
are
required for the status change because of the power-save control turning on/off.
Default value: 000.
PSVAD ADC Power-save control
xx0 ADC1/2 normal operation
xx1 ADC1/2 power-save mode
x0x ADC3/4 normal operation
x1x ADC3/4 power-save mode
0xx ADC5/6 normal operation
1xx ADC5/6 power-save mode
BYP[2:0] ADC HPF bypass control
These bits control the HPF function and dc components of the input signal; internal dc offset is
converted in bypass mode.
Default value: 000.
BYP ADC HPF bypass control
xx0 ADC1/2 normal output, HPF enabled
xx1 ADC1/2 bypassed output, HPF disabled
x0x ADC3/4 normal output, HPF enabled
x1x ADC3/4 bypassed output, HPF disabled
0xx ADC5/6 normal output, HPF enabled
1xx ADC5/6 bypassed output, HPF disabled
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