Datasheet
VDD
SynchronousClocks
ZERO
Power-Down
NormalOperationNormalOperation
SynchronousClocks
0V
SCKI,
BCKAD/DA,
LRCKAD/DA
RST
InternalReset
VOUT1 to
VOUT8
±
±
DOUT1/2/3
t
ADCDLY2
t
DACDLY1
t
DACDLY2
0.5 VCC´
(VDD=3.3V,typ)
3846 SCKI´
Fade-In
100ns(min)
t
ADCDLY1
AUDIO SERIAL PORT OPERATION
AUDIO DATA INTERFACE FORMATS AND TIMING
PCM3168A
PCM3168A-Q1
www.ti.com
......................................................................................................................................................................................... SBAS452 – SEPTEMBER 2008
Figure 34. External Reset Timing Requirements
The PCM3168A and PCM3168A-Q1 audio serial ports consist of 11 signals: BCKDA, BCKAD, LRCKDA,
LRCKAD, DIN1, DIN2, DIN3, DIN4, DOUT1, DOUT2, and DOUT3. The PCM3168A and PCM3168A-Q1 also
support audio interface mode, slave mode, and master mode. The BCKAD/DA is a bit clock input at the slave
mode and an output at the master mode. The LRCKAD/DA is a left/right word clock or frame synchronization
clock input at slave mode and output at master mode. The DIN1/2/3/4 are the audio data inputs for the DAC. The
DOUT1/2/3 are the audio data outputs from the ADC. BCKAD, LRCKAD and DOUT1/2/3 are used for the ADC,
and BCKDA, LRCKDA and DIN1/2/3/4 are used for the DAC.
The PCM3168A and PCM3168A-Q1 support eight audio data interface formats for the ADC and DAC separately
in both master and slave modes: 24-bit I
2
S, 24-bit left-justified, 24-bit right-justified, 16-bit right-justified, 24-bit
left-justified mode DSP, 24-bit I
2
S mode DSP, 24-bit left-justified mode TDM, and 24-bit I
2
S mode TDM format.
The PCM3168A and PCM3168A-Q1 also support two audio data interface formats for the DAC and slave mode:
24-bit left-justified mode high-speed TDM and 24-bit I
2
S mode high-speed TDM format. In the case of I
2
S,
left-justified, and right-justified data formats, 64 BCKs, 48 BCKs, and 32 BCKs per LRCK period are supported,
but 48 BCKs are limited in slave mode and 32 BCKs are limited in slave mode 16-bit right-justified only. In the
case of TDM data format in single rate, BCKAD/DA, LRCKAD/DA, DOUT1, and DIN1 are used. In the case of
TDM data format in dual rate, BCKAD/DA, LRCKAD/DA, DOUT1/2, and DIN1/2 are used. In the case of
high-speed TDM format in dual rate, BCKDA, LRCKDA, and DIN1 are used. In the case of high-speed TDM
format in quad rate, BCKDA, LRCKDA, and DIN1/2 are used. TDM format and high-speed TDM format are
supported only at SCKI = 512 f
S
, 256 f
S
, 128 f
S
, and f
BCK
≤ f
SCKI
. The audio data formats are selected by
MC/SCL/FMT in hardware control mode and registers 65 and 81 in software control mode. All data must be in
binary twos complement, MSB first.
Figure 35 through Figure 41 show 10 audio interface data formats. Table 8 summarizes the applicable formats
and describes the relationships among them and the respective restrictions with mode control.
Copyright © 2008, Texas Instruments Incorporated Submit Documentation Feedback 23
Product Folder Link(s): PCM3168A PCM3168A-Q1