Datasheet
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PCM3060
SLAS533B – MARCH 2007 – REVISED MARCH 2008
Table 1. TERMINAL FUNCTIONS
TERMINAL
I/O DESCRIPTION
NAME PIN
AGND1 23 – ADC analog ground
AGND2 22 – DAC analog ground
BCK1 5 I/O
(1)
Audio data bit clock input/output for ADC
BCK2 10 I/O
(1)
Audio data bit clock input/output for DAC
DGND 8 – Digital ground
DIN 12 I
(2)
Audio data digital input for DAC
DOUT 3 O Audio data digital output for ADC
LRCK1 4 I/O
(1)
Audio data left/right clock input/output for ADC
LRCK2 11 I/O
(1)
Audio data left/right clock input/output for DAC
MC/SCL/FMT 1 I
(2)
Mode control, clock for SPI, clock for I
2
C, format for H/W mode
(5)
MD/SDA/DEMP 2 I/O
(3)
Mode control, data for SPI, data for I
2
C, de-emphasis for H/W mode
This pin provides four operation modes according to its input connection. Connected directly to
V
DD
: SPI mode. Connected to VDD through 220-k Ω pullup resistor: H/W mode, single-ended
MODE 28 I
(4)
V
OUT
X. Connected to DGND through 220-k Ω pulldown resistor: H/W mode, differential V
OUT
X.
Connected directly to DGND : I
2
C mode.
MS/ADR/IFMD 27 I
(2)
Mode control, select for SPI with low active, address for I
2
C, I/F mode for H/W mode
RST 15 I
(5)
Reset and power-down control input, active-low
SCKI1 6 I
(2)
System clock input for ADC
SCKI2 9 I
(2)
System clock input for DAC
SGND 16 – Shield analog ground
V
CC
24 – ADC, DAC analog power supply, 5-V
V
COM
21 – ADC, DAC voltage common decoupling
V
DD
7 – Digital power supply, 3.3-V
V
IN
L 25 I Analog input to ADC, L-channel
V
IN
R 26 I Analog input to ADC, R-channel
V
OUT
L – 19 O Analog output from DAC, L-channel – in differential mode, must be open in single-ended mode
V
OUT
L+ 20 O Analog output from DAC, L-channel + in differential mode, L-channel in single-ended mode
ZEROL 14 O Zero flag, L-channel
ZEROR 13 O Zero flag, R-channel
V
OUT
R – 17 O Analog output from DAC, R-channel – in differential mode, must be open in single-ended mode
V
OUT
R+ 18 O Analog output from DAC, R-channel + in differential mode, R-channel in single-ended mode
(1) Schmitt-trigger input/output with 50-k Ω typical internal pulldown resistor
(2) Schmitt-trigger input, 5-V tolerant
(3) Schmitt-trigger input, 5 V tolerant for SPI, H/W mode and Schmitt-trigger input/open drain LOW output, 5-V tolerant for I
2
C
(4) V
DD
/2 biased, quad-state input
(5) Schmitt-trigger input with 50-k Ω typical internal pulldown resistor, 5-V tolerant
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