Datasheet

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ELECTRICAL CHARACTERISTICS
PCM3060
SLAS533B – MARCH 2007 – REVISED MARCH 2008
All specifications at T
A
= 25 ° C, V
CC
= 5 V, V
DD
= 3.3 V, f
S
= 48 kHz, SCKI1 = SCKI2 = 512 f
S
, 24-bit data (unless otherwise
noted).
PCM3060PW
PARAMETER TEST CONDITIONS UNIT
MIN TYP MAX
DIGITAL INPUT/OUTPUT
DATA FORMAT
Audio data interface format I
2
S, LJ, RJ
Audio data word length 16, 24 Bits
Audio data format MSB-first, 2s-complement
Sampling frequency, ADC 16 48 96
f
S
kHz
Sampling frequency, DAC 16 48 192
System clock frequency 128, 192, 256, 384, 512, 768 f
S
2.048 36.864 MHz
INPUT LOGIC
V
IH
(1)
2 V
DD
V
IL
(1)
0.8
Input logic level VDC
V
IH
(2) (3)
2 5.5
V
IL
(2) (3)
0.8
I
IH
(2)
V
IN
= V
DD
± 10
I
IL
(2)
V
IN
= 0 V ± 10
Input logic current µ A
I
IH
(1) (3)
V
IN
= V
DD
65 100
I
IL
(1) (3)
V
IN
= 0 V ± 10
OUTPUT LOGIC
V
OH
(4)
I
OUT
= – 4 mA 2.8
Output logic level VDC
V
OL
(4) (5)
I
OUT
= 4 mA 0.5
REFERENCE OUTPUT
V
COM
output voltage 0.5 V
CC
V
V
COM
output impedance 7 12.5 18 k Ω
Allowable V
COM
output
± 1 µ A
source/sink current
ADC CHARACTERISTICS
Resolution 16 24 Bits
ANALOG INPUT
Full scale input voltage V
IN
L, V
IN
R = 0 dB 0.6 V
CC
Vp-p
Center voltage 0.5 V
CC
V
Input impedance 10 k Ω
Antialiasing filter response – 3 dB 300 kHz
DC ACCURACY
Gain mismatch,
Full-scale input, V
IN
L, V
IN
R ± 2 ± 8 % of FSR
channel-to-channel
Gain error Full-scale input, V
IN
L, V
IN
R ± 2 ± 8 % of FSR
Bipolar zero error HPF bypass, V
IN
L, V
IN
R ± 0.5 ± 2 % of FSR
(1) BCK1, BCK2, LRCK1, LRCK2 (in slave mode, Schmitt-trigger input with 50-k Ω typical internal pulldown resistor)
(2) SCKI1, SCKI2, DIN, MS/ADR/IFMD, MC/SCL/FMT, MD/SDA/IFMD (Schmitt-trigger input, 5-V tolerant).
(3) RST (Schmitt-trigger input with 50-k Ω typical internal pulldown resistor, 5-V tolerant).
(4) BCK1, BCK2, LRCK1, LRCK2 (in master mode), DOUT, ZEROL, ZEROR
(5) MD/SDA/IFMD (in I
2
C mode, open drain LOW output)
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Product Folder Link(s): PCM3060