Datasheet
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DOUT
0.5 V
DD
0.5 V
DD
0.5 V
DD
DIN
1.4 V
1.4 V
BCK1/2
(Output)
SCKI1/2
(Input)
LRCK1/2
(Output)
t
(BCY)
t
(DIH)
t
(BCH)
t
(BCL)
t
(LRD)
t
(DIS)
t
(DOD)
t
(BCD)
t
(BCD)
T0248-01
Audio Interface Format
PCM3060
SLAS533B – MARCH 2007 – REVISED MARCH 2008
SYMBOL PARAMETERS MIN TYP MAX UNIT
t
(BCY)
BCK1/2 cycle time 1/64 f
S
t
w(BCH)
BCK1/2 high time 0.4 t
(BCY)
0.5 t
(BCY)
0.6 t
(BCY)
t
w(BCL)
BCK1/2 low time 0.4 t
(BCY)
0.5 t
(BCY)
0.6 t
(BCY)
t
(LRD)
LRCK1/2 delay time from BCK1/2 falling edge 0 30 ns
t
(DIS)
DIN setup time to BCK1/2 rising edge 10 ns
t
(DIH)
DIN hold time to BCK1/2 rising edge 10 ns
t
(DOD)
DOUT delay time from BCK1/2 falling edge 0 30 ns
t
(BCD)
BCK1/2 delay time from SCKI1/2 rising edge
(1)
10 40 ns
NOTE: Load capacitance of output is 20 pF.
(1) This specification applies for SCKI1/2 when the frequency is less than 25 MHz.
Figure 25. Audio Data Interface Timing (Master Mode: BCK1/2 and LRCK1/2 work as Outputs)
The PCM3060 supports the following four interface formats in both slave and master modes, and they are
selectable independently for the ADC and DAC using serial mode control.
24-bit I
2
S format
24-bit left-justified format
24-bit right-justified format
16-bit right-justified format
All formats are provided in MSB-first, 2s complement data format.
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Product Folder Link(s): PCM3060