Datasheet
www.ti.com
TYPICAL CIRCUIT CONNECTION
V
COM
MBIAS
MINM
MINP
AGND3
V
CC
3
REFO
V
DD
DGND
DOUTS
DOUT
DIN
BCK
LRCK
PCM3052A
26
27
28
29
30
31
32
16
15
14
13
12
11
10
ATEST
V
IN
L
L/M
V
REF
1
V
REF
2
V
IN
R
V
CC
1
AGND1
PDWN
1
2
3
4
5
6
7
8
9
V
OUT
L
V
OUT
R
V
CC
2
AGND2
I2CEN
ADR
SCL
SDA
SCKI
25
24
23
22
21
20
19
18
17
Post
LPF
+
+
C
13
+
C
14
+
C
2
Line Out Control
5 VGND
+
C
9
C
10
C
8
+
C
3
C
7
+
C
15
R
1
R
2
+
Mic In
3.3 V
+
C
4
System Clock
and
Audio Interface
C
1
+
C
12
+
C
6
+
C
5
+
C
11
Line In
S0126-01
PCM3052A
SLES160 – NOVEMBER 2005
Figure 56 illustrates typical circuit connection.
NOTE: C
1
– C
4
: 0.1- µ F ceramic and 10- µ F electrolytic capacitors typical, depending on power supply quality and pattern
layout.
C
5
– C
8
: 0.1- µ F ceramic and 10- µ F electrolytic capacitors are recommended.
C
9
, C
10
: 1- µ F non-polar electrolytic capacitors are recommended, which give 27-Hz cutoff frequency.
C
11
, C
12
: 0.22- µ F electrolytic capacitors are recommended, which give 5-Hz cutoff frequency at PGA gain = 0 dB.
C
13
, C
14
: 2.2- µ F electrolytic capacitors are typical.
C
15
: 10- µ F electrolytic capacitor is recommended.
R
1
, R
2
: 1-k Ω typical is recommended.
Figure 56. Typical Application Diagram
41