Datasheet

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SERIAL CONTROL PORT FOR MODE CONTROL

Slave Address

Packet Protocol

SDA

SCL St

Start

1−7 8 1−8 9 1−8 9 9 Sp

Stop

Slave Address ACK DATA ACK DATA ACK ACK

ConditionCondition

R/W

Write Operation

Transmitter

M M M S M S M S S M

Data Type

St Slave Address W ACK DATA ACK DATA ACK ACK Sp

R/W: Read Operation if 1; Otherwise, Write Operation

ACK: Acknowledgement of a Byte if 0

DATA: 8 Bits (Byte)

NACK: Not Acknowledgement of a bite if 1

T0049-04

M: Master Device S: Slave Device

St: Start Condition W

: Write Sp: Stop Condition

PCM3052A

SLES160 – NOVEMBER 2005

The several built-in functions of the PCM3052A can be controlled through the I

C format serial-control port, SDA

(pin 18) and SCL (pin 19). The PCM3052A supports the I

C serial bus and the data transmission protocol for

standard mode as a slave device. This protocol is explained in I

C specification 2.0.

Serial control is available even during the power-down state and without a system clock, except when the MRST

bit = 0 or I2CEN (pin 21) = LOW.

MSB LSB

1 0 0 0 1 1 ADR R/ W

The PCM3052A has seven bits for its own slave address. The first six bits (MSBs) of the slave address are

factory preset to 100011. The next bit of the address byte is the device select bit which can be user-defined by

ADR (pin 20). A maximum of two PCM3052As can be connected on the same bus at one time. Each PCM3052A

responds when it receives its own slave address.

A master device must control packet protocol, which consists of start condition, slave address with read/write bit,

data if write or acknowledgement if read, and stop condition. The PCM3052A supports slave receiver function.

Figure 52. Basic I

C Framework