Datasheet

PCM3010
SLES055 – NOVEMBER 2002
29
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V
IN
pins
A 1-µF electrolytic capacitor is recommended as an ac-coupling capacitor, which gives an 8-Hz cutoff frequency.
If a higher full-scale input voltage is required, it can be adjusted by adding only one series resistor to each V
IN
pin.
V
REF
1, V
REF
2 pins
A 0.1-µF ceramic capacitor and a 10-µF electrolytic capacitor are recommended between V
REF
1, V
REF
2, and
AGND1 to ensure low source impedance of the ADC references. These capacitors should be located as close
as possible to the V
REF
1 and V
REF
2 pins and the AGND1 pin to reduce dynamic errors on the ADC references.
V
COM
pin
A 0.1-µF ceramic capacitor and a 10-µF electrolytic capacitor are recommended between V
COM
and AGND2
to ensure low source impedance of the DAC common voltage. These capacitors should be located as close as
possible to the V
COM
pin to reduce dynamic errors on the DAC common voltage.
system clock
The quality of SCKI may influence dynamic performance, as the PCM3010 (both DAC and ADC) operates
based on SCKI. Therefore, it may be necessary to consider the jitter, duty cycle, rise and fall time, etc., of the
system clock.
reset control
If large capacitors (more than 22 µF) are used on V
REF
1, V
REF
2, and V
COM
, external reset control by
PDWN
= LOW is required after the V
REF
1, V
REF
2, and V
COM
transient response settles.
external mute control
To eliminate the clicking noise which is generated by DAC output dc level change during power-down ON/OFF
control, external mute control is generally required. The recommended control sequence is: external mute ON,
codec power down ON, SCKI stop and restart if necessary, codec power down OFF, and external mute OFF.