Datasheet
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V
REF
2
20
19
18
17
16
15
14
13
5
6
7
8
9
10
11
12
V
IN
L
PDAD
PDDA
SYSCLK
LRCIN
BCKIN
DOUT
V
OUT
R
DGND
V
OUT
L
DEM0
DEM1
NC
V
DD
DIN
Rch In
Audio
Interface
V
CC
1
24
23
22
21
1
2
3
4
V
CC
1
V
IN
R
V
REF
1
V
CC
2
NC
AGND
V
COM
+
+
0.1 µF
and 10 µF
(1)
DEM0
Control
Interface
PCM3006
+
+
1 µF
(3)
4.7 µF
(2)
4.7 µF
(2)
Lch In
+
1 µF
(3)
SYSCLK
L/R CLK
BIT CLK
DATA OUT
DATA IN
S0014-02
+3 V Analog V
CC
+
+
0.1 µF
and 10 µF
(1)
4.7 µF
(2)
+
4.7 µF
(4)
Rch Out
(5)
Lch Out
(5)
DEM1
0.1 µF
and 10 µF
(1)
PDDA
PDAD
4.7 µF
(4)
+
PCM3006
SBAS089A – OCTOBER 2000 – REVISED OCTOBER 2004
(1) 0.1- µ F ceramic and 10- µ F tantalum, typical, depending on power supply quality and pattern layout
(2) 4.7- µ F, typical, gives settling time with a 30-ms (4.7 µ F × 6.4 k Ω ) time constant in the power ON and power-down
OFF periods.
(3) 1- µ F, typical, gives a 5.3-Hz cutoff frequency for the input HPF in normal operation, and gives a settling time with a
30-ms (1 µ F × 30 k Ω ) time constant in the power ON and power-down OFF periods.
(4) 4.7- µ F, typical, gives a 3.4-Hz cutoff frequency for the output HPF in normal operation, and gives a settling time with
a 47-ms (4.7 µ F × 10 k Ω ) time constant in the power ON and power-down OFF periods.
(5) Post low-pass filter with RIN > 10 k Ω , depending on the system performance requirements
Figure 39. Typical Connection Diagram for PCM3006
23