Datasheet

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PROGRAM REGISTER 3
PCM3002
PCM3003
SBAS079A – OCTOBER 2000 – REVISED OCTOBER 2004
DEM[1:0]: Bits 2, 1: DAC de-emphasis control
These bits select the de-emphasis mode as shown below:
DEM1 DEM0 DE-EMPHASIS STATUS
0 0 De-emphasis 44. 1 kHz ON
0 1 De-emphasis OFF (default)
1 0 De-emphasis 48 kHz ON
1 1 De-emphasis 32 kHz ON
MUT: Bit 0: DAC soft mute control
When set to 1, both left- and right-channel DAC outputs are muted at the same time. This muting is
done by attenuating the data in the digital filter, so there is no audible click noise when soft mute is
turned on.
MUT MUTE STATUS
0 Mute disabled (default)
1 Mute enabled
res: Bits 15–11: Reserved
These bits are reserved and should be set to 0.
A[1:0] Bits 10, 9: Register address
These bits define the address for register 3:
A1 A0 REGISTER
1 1 Register 3
res: Bits 8–6: Reserved
These bits are reserved and should be set to 0.
LOP: Bit 5: ADC to DAC loopback control
When this bit is set to 1, the ADC audio data is sent directly to the DAC. The data format defaults to
I
2
S; DOUT is still available in loopback mode.
LOP LOOPBACK STATUS
0 Loopback disabled (default)
1 Loopback enabled
res: Bit 4: Reserved
This bit is reserved and should be set to 0.
FMT[1:0] Bits 3–2: Audio data format select
These bits determine the input and output audio data formats.
FMT1 FMT0 DAC DATA FORMAT ADC DATA FORMAT NAME
0 0 16-bit, MSB-first, right-justified 16-bit, MSB-first, left-justified Format 0 (default)
0 1 20-bit, MSB-first, right-justified 20-bit, MSB-first, left-justified Format 1
1 0 20-bit, MSB-first, left-justified 20-bit, MSB-first, left-justified Format 2
1 1 20-bit, MSB-first, I
2
S 20-bit, MSB-first, I
2
S Format 3
LRP: Bit 1: ADC to DAC LRCIN polarity select
Polarity of LRCIN applies only to formats 0 through 2.
LRP LEFT/RIGHT POLARITY
0 Left channel is H, right channel is L (default).
1 Left channel is L, right channel is H.
30