Datasheet

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ELECTRICAL CHARACTERISTICS
PCM3002
PCM3003
SBAS079A – OCTOBER 2000 – REVISED OCTOBER 2004
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated
circuits be handled with appropriate precautions. Failure to observe proper handling and installation
procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision
integrated circuits may be more susceptible to damage because very small parametric changes could
cause the device not to meet its published specifications.
All specifications at T
A
= 25 ° C, V
DD
= V
CC
= 3 V, f
S
= 44.1 kHz, SYSCLK = 384 f
S
, and 16-bit data, unless otherwise noted
PCM3002E/3003E
PARAMETER CONDITIONS
MIN TYP MAX UNITS
DIGITAL INPUT/OUTPUT
Input Logic
V
IH
(1) (2) (3)
0.7 V
DD
Input logic level VDC
V
IL
(1) (2) (3)
0.3 V
DD
I
IN
(2)
± 1
Input logic current µ A
I
IN
(1) (3)
100
Output Logic
V
OH
(4)
I
OUT
= –1 mA V
DD
– 0.3
V
OL
(4)
Output logic level I
OUT
= 1 mA 0.3 VDC
V
OL
(5)
I
OUT
= 1 mA 0.3
CLOCK FREQUENCY
f
s
Sampling frequency 4
(6)
44.1 48 kHz
256 f
S
1.024 11.2896 12.288
System clock frequency 384 f
S
1.536 16.9344 18.432 MHz
512 f
S
2.048 22.5792 24.576
ADC CHARACTERISTICS
Resolution 20 Bits
DC Accuracy
Gain mismatch, channel- ± 1 ± 3 % of FSR
to-channel
Gain error ± 2 ± 5 % of FSR
Gain drift ± 20 ppm of FSR/ ° C
Bipolar zero error High-pass filter bypassed
(7)
± 1.7 % of FSR
Bipolar zero drift High-pass filter bypassed
(7)
± 20 ppm of FSR/ ° C
Dynamic Performance
(8)
V
IN
= –0.5 dB –86 –80
THD+N dB
V
IN
= –60 dB –28
Dynamic range A-weighted 86 90 dB
Signal-to-noise ratio A-weighted 86 90 dB
Channel separation 84 88 dB
(1) Pins 7, 8, 17 and 18: RST, ML, MD, and MC for the PCM3002; PDAD, PDDA, DEM1, and DEM0 for PCM3003 (Schmitt-trigger input
with 100-k Ω typical internal pulldown resistor)
(2) Pins 9, 10, 11, 15: SYSCLK, LRCIN, BCKIN, DIN (Schmitt-trigger input)
(3) Pin 16: 20BIT for PCM3003 (Schmitt-trigger input, 100-k Ω typical internal pulldown resistor)
(4) Pin 12: DOUT
(5) Pin 16: ZFLG for PCM3002 (open-drain output)
(6) See Application Bulletin SBAA033 for information relating to operation at lower sampling frequencies.
(7) High-pass filter for offset cancel
(8) f
IN
= 1 kHz, using the System Two™ audio measurement system by Audio Precision™ in rms mode with 20-kHz LPF, 400-Hz HPF used
for performance calculation.
2