Datasheet

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APPLICATION INFORMATION
APPLICATION AND LAYOUT CONSIDERATIONS
TYPICAL CONNECTION
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
470 pF
470 pF
+
4.7 µF
4.7 µF
+
2.2 µF
(2)
+
2.2 µF
(2)
+
10 to 33 pF
4.7 µF
+
Register Control
Interface
Reference
Bias
Analog
Front-End
Decimation
Filter
Interpolation
Filter
LPF and
Buffer
Digital
Audio
Interface
CLK/OSC
Manager
Delta-Sigma
Delta-Sigma
Post
Low-Pass
Filter
(1)
(1)
(1)
Serial
Control
or
Format
Control
Digital
Audio
Data
Reset
Line In Left-Channel
+5V
Line In Right-Channel
Line Out Right-Channel
Line Out Left-Channel
S0018-01
Post
Low-Pass
Filter
Analog
Front-End
LPF and
Buffer
POWER SUPPLY BYPASSING
PCM3000
PCM3001
SBAS055A – OCTOBER 2000 – REVISED OCTOBER 2004
A typical connection diagram for the PCM3000/3001 is shown in Figure 34 .
(1) Bypass capacitor = 0.1 µ F and 10 µ F.
(2) The input capacitor affects the pole of the HPF. Example: 2.2 µ F sets the cutoff frequency to 4.8 Hz, with a 66-ms
time constant.
Figure 34. Typical Connection Diagram for PCM3000/3001
The digital and analog power-supply lines to the PCM3000/3001 should be bypassed to the corresponding
ground pins with both 0.1- µ F ceramic and 10- µ F tantalum capacitors as close to the device pins as possible to
maximize the performance of the ADC and DAC. Although the PCM3000/3001 has three power supply lines to
optimize dynamic performance, the use of one common power supply is generally recommended to avoid
unexpected latch-up or pop noise due to power-supply sequencing problems. If separate power supplies are
used, back-to-back diodes between the two power sources near the device are recommended to avoid latch-up
problems.
34