Datasheet

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PCM3000
PCM3001
SBAS055A – OCTOBER 2000 – REVISED OCTOBER 2004
MUT: Bit 0 – DAC Soft Mute Control
When set to 1, both left- and right-channel DAC outputs are muted at the same time. This muting is done by
attenuating the data in the digital filter, so that there is no audible click noise when soft mute is turned on.
MUT
0 Mute disabled (default)
1 Mute enabled
PROGRAM REGISTER 3
res: Bits 15:11 – Reserved
These bits are reserved and should be set to 0.
A[1:0]: Bits 10:9 – Register Address
These bits define the address for REGISTER 3.
A1 A0
1 1 Register 3
res: Bits 8:6 – Reserved
These bits are reserved and should be set to 0.
LOP: Bit 5 – ADC to DAC Loopback Control
When this bit is set to 1, the ADC audio data is sent directly to the DAC. The data format defaults to I
2
S; DOUT
is still available in loopback mode.
LOP
0 Loopback disabled (default)
1 Loopback enabled
FMT[2:0]: Bits 4:2 – Audio Data Format Select
These bits determine the input and output audio data formats. (default: FMT[2:0] = 000
b
)
FM2 FMT1 FMT0 DAC DATA FORMAT ADC DATA FORMAT
0 0 0 16-bit, MSB-first, right-justified 16-bit, MSB-first, left-justified
0 0 1 18-bit, MSB-first, right-justified 18-bit, MSB-first, left-justified
0 1 0 16-bit, MSB-first, right-justified 16-bit, MSB-first, right-justified
0 1 1 18-bit, MSB-first, right-justified 18-bit, MSB-first, right-justified
1 0 0 16-/18-bit, MSB-first, left-justified 18-bit, MSB-first, left-justified
1 0 1 16-/18-bit, MSB-first, I
2
S 18-bit, MSB-first, I
2
S
1 1 0 16-bit, MSB-first, DSP-frame 16-bit, MSB-first, DSP-frame
1 1 1 Reserved Reserved
LRP: Bit 1 – ADC-to-DAC LRCK Polarity Select
Polarity of LRCIN applies only to formats 0 through 4.
LOP
0 Left channel is H, right channel is L (default).
1 Left channel is L, right channel is H.
res: Bit 0 – Reserved
This bit is reserved and should be set to 0.
PCM3001 DATA FORMAT CONTROL
The input and output data formats are controlled by pins 27 (FMT0), 26 (FMT1), and 25 (FMT2). Set these pins
to the same values shown for the bit-mapped PCM3000 controls in program register 3.
31