Datasheet

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FUNCTIONAL BLOCK DIAGRAM
PLL (x16)
V
IN
V L
OUT
USBProtocol
Controller
XTI
D–
D+
SSPND
96MHz
Tracker
(SpAct
®
)
FIFO
Analog
PLL
Power
Manager
V
BUS
AGND/ HGND/ PGND/DGND
6.000MHz
XTO
ISO-In
Endpoint
Control
Endpoint
POWER
Analog
PLL
5Vto3.3V
Voltage
Regulator
REC.
XCVR
USBSIE
Selector
Selector
FIFO
MIC
AMP
+20/0dB
HP AMP 15mW (@32 W)
ATT 0 dB~ –76 dB
in1 dBsteps withMute
V
COM2
PGA + 30 dB~ –12 dB
in1 dBsteps
S
S
MIC
BIAS
MBIAS
ATT 0dB~ –76 dB
in1 dBstepswith Mute
PLAY
TEST 0
TEST 1
MAMP
MMUTE
Vref.
BGND
DAC
ADC
FL
FR
V /V /V /V /V
CCA CCP CCL CCR DD
ISO-Out
Endpoint
V
COM1
V R
OUT
PCM2912
SLES216 – FEBRUARY 2008
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