Datasheet
t
(BUF)
t
(D-SU)
t
(S-HD)
t
(CK-F)
t
(HI)
t
(RS-SU)
t
(LOW)
t
(CK-R)
t
(RS-HD)
t
(D-HD)
t
(DT-R)
t
(DT-F)
t
(P-SU)
Start
Repeated
Start Stop
DT
CK
PCM2704C, PCM2705C
PCM2706C, PCM2707C
SBFS036A –AUGUST 2011–REVISED JULY 2012
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Figure 28 shows the timing for an external ROM read interface. The respective timing characteristics are
summarized in Table 12.
Figure 28. External ROM Read Interface Timing Requirements
Table 12. External ROM Read Interface Timing Characteristics
SYMBOL PARAMETER MIN MAX UNIT
f
(CK)
CK clock frequency 100 kHz
t
(BUF)
Bus free time between a STOP and a START condition 4.7 μs
t
(LOW)
Low period of the CK clock 4.7 μs
t
(HI)
High period of the CK clock 4 μs
t
(RS-SU)
Setup time for START/repeated START condition 4.7 μs
t
(S-HD)
Hold time for START/repeated START condition 4 μs
t
(RS-HD)
t
(D-SU)
Data setup time 250 ns
t
(D-HD)
Data hold time 0 900 ns
t
(CK-R)
Rise time of CK signal 20 + 0.1 C
B
1000 ns
t
(CK-F)
Fall time of CK signal 20 + 0.1 C
B
1000 ns
t
(DT-R)
Rise time of DT signal 20 + 0.1 C
B
1000 ns
t
(DT-F)
Fall time of DT signal 20 + 0.1 C
B
1000 ns
t
(P-SU)
Setup time for STOP condition 4 μs
C
B
Capacitive load for DT and CK lines 400 pF
V
NH
Noise margin at high level for each connected device (including hysteresis) 0.2 V
DD
V
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