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PCM1850A
PCM1851A
SLES173 – MARCH 2006
PCM1851A
TERMINAL
I/O DESCRIPTION
NAME NO.
ADR 30 I Mode control address select input
(1)
AGND 29 — Analog GND
BCK 2 I/O Bit clock input/output
(2)
DGND 5 — Digital GND
DOUT 3 O Audio data output
LRCK 1 I/O Sampling clock input/output
(2)
MOUTL 12 O Multiplexer output, L-channel
MOUTR 11 O Multiplexer output, R-channel
OVER 4 O Overflow flag
RST 10 I Reset, active-LOW
(1)
SCKI 7 I System clock input; 256 f
S
, 384 f
S
, 512 f
S
, or 768 f
S
(3)
SCL 31 I Mode-control clock input
(3)
SDA 32 I/O Mode-control data input/output
(4)
TEST0 8 I Test 0, must be connected to GND
(1)
TEST1 9 I Test 1, must be connected to GND
(1)
V
CC
28 — Analog power supply, 5-V
V
DD
6 — Digital power supply, 3.3-V
V
IN
L1 13 I Analog input 1, L-channel
V
IN
L2 15 I Analog input 2, L-channel
V
IN
L3 17 I Analog input 3, L-channel
V
IN
L4 19 I Analog input 4, L-channel
V
IN
L5 21 I Analog input 5, L-channel
V
IN
L6 23 I Analog input 6, L-channel
V
IN
R1 14 I Analog input 1, R-channel
V
IN
R2 16 I Analog input 2, R-channel
V
IN
R3 18 I Analog input 3, R-channel
V
IN
R4 20 I Analog input 4, R-channel
V
IN
R5 22 I Analog input 5, R-channel
V
IN
R6 24 I Analog input 6, R-channel
V
REF
S 25 — Reference S decoupling capacitor (= 0.5 V
CC
)
V
REF
1 26 — Reference 1 decoupling capacitor (= 0.5 V
CC
)
V
REF
2 27 — Reference 2 decoupling capacitor (= V
CC
)
(1) Schmitt-trigger input with internal pulldown resistor (50 k Ω , typically), 5-V tolerant
(2) Schmitt-trigger input with internal pulldown resistor (50 k Ω , typically)
(3) Schmitt-trigger input, 5-V tolerant
(4) Schmitt-trigger input/open-drain LOW output, 5-V tolerant
4
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