Datasheet

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APPLICATION INFORMATION
TYPICAL CIRCUIT CONNECTION DIAGRAM
23 22 21 20 19
1 2
V
IN
R2
V
IN
L2
V
IN
R1
V
IN
L1
MOUTL
MOUTR
RST
TEST1
V
REF
S
V
REF
1
V
REF
2
V
cc
AGND
MS (ADR)
(1)
MC (SCL)
(1)
MD (SDA)
(1)
24 18
3 4 5 6 7 8
17
V
IN
R6
V
IN
L6
V
IN
R5
V
IN
L5
V
IN
R4
V
IN
L4
V
IN
R3
V
IN
L3
LRCK
BCK
DOUT
OVER
DGND
V
DD
SCKI
TEST0
25
26
27
28
29
30
31
32
16
15
14
13
12
11
10
9
+
C
16
C
17
C
15
C
14
C
13
C
12
C
11
C
10
+ + + + + + +
Analog Input/Output
+
C
9
+
C
8
+
C
7
+
C
6
+
C
19
+
C
18
+
C
5
+
C
4
+
C
3
+
C
1
+5 V
0 V
C
2
+
3.3 V
Control
Audio Data Processor
PCM1850A/1851A
(1)
PCM1850A (PCM1851A)
S0181-01
PCM1850A
PCM1851A
SLES173 MARCH 2006
The following figure illustrates a typical circuit connection diagram for six stereo inputs and an analog monitor.
NOTE: C
1
, C
2
: 0.1- µ F ceramic and 10- µ F electrolytic capacitors are recommended, depending on layout and power supply.
C
3
, C
4
, C
5
: 0.1- µ F ceramic and 10- µ F electrolytic capacitors are recommended.
C
6
–C
17
: A 0.33- µ F capacitor gives a 2.9-Hz ( τ = 0.33 µ F × 169 k ) typical cutoff frequency at the HPF input in normal
operation, and it requires power-on settling time with a 56-ms time constant in the power-on initialization period.
Cutoff frequency and time constant depend on PGA gain. Cutoff frequency varies from 2.4 Hz to 8.5 Hz for 0.33 µ F.
DC-coupled input is inhibited for the analog input, V
IN
L[1:6] and V
IN
R[1:6].
C
18
–C
19
: A 2.2- µ F capacitor with a 10-k load gives a 7.2-Hz cutoff frequency.
28
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