Datasheet

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SERIAL AUDIO DATA INTERFACE
INTERFACE MODE
DATA FORMAT
PCM1808
SLES177A – APRIL 2006 – REVISED AUGUST 2006
The PCM1808 interfaces the audio system through LRCK (pin 7), BCK (pin 8), and DOUT (pin 9).
The PCM1808 supports master mode and slave mode as interface modes, which are selected by MD1 (pin 11)
and MD0 (pin 10), as shown in Table 2 . MD1 and MD0 must be set prior to power on.
In master mode, the PCM1808 provides the timing of serial audio data communications between the PCM1808
and the digital audio processor or external circuit. While in slave mode, the PCM1808 receives the timing for
data transfer from an external controller.
Table 2. Interface Modes
MD1 (Pin 11) MD0 (Pin 10) INTERFACE MODE
Low Low Slave mode (256 f
S
, 384 f
S
, 512 f
S
autodetection)
Low High Master mode (512 f
S
)
High Low Master mode (384 f
S
)
High High Master mode (256 f
S
)
Master mode
In master mode, BCK and LRCK work as output pins, and these pins are controlled by timing which is generated
in the clock circuit of the PCM1808. The frequency of BCK is fixed at 64 BCK/frame.
Slave mode
In slave mode, BCK and LRCK work as input pins. The PCM1808 accepts 64-BCK/frame or 48-BCK/frame
format (only for a 384-f
S
system clock), not 32-BCK/frame format.
The PCM1808 supports two audio data formats in both master and slave modes. The data formats are selected
by FMT (pin 12), as shown in Table 3 . Figure 21 illustrates the data formats in slave mode and master mode.
Table 3. Data Format
FORMAT NO. FMT (Pin 12) FORMAT
0 Low I
2
S, 24-bit
1 High Left-justified, 24-bit
14
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