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SYSTEM CLOCK
FADE-IN AND FADE-OUT FUNCTIONS
PCM1807
SLES147 – SEPTEMBER 2005
The PCM1807 supports 256 f
S
, 384 f
S
and 512 f
S
as system clock, where f
S
is the audio sampling frequency. The
system clock must be supplied on SCKI (pin 6).
The PCM1807 has a system clock detection circuit which automatically senses if the system clock is operating at
256 f
S
, 384 f
S
, or 512 f
S
in slave mode. In master mode, the system clock frequency must be controlled through
the serial control port, which uses MD (pin 10), MC (pin 11), and MS (pin 12). The system clock is divided down
automatically to generate frequencies of 128 f
S
and 64 f
S
, which are used to operate the digital filter and the
delta-sigma modulator, respectively.
Table 1 shows some typical relationships between sampling frequency and system clock frequency, and
Figure 17 shows system clock timing.
Table 1. Sampling Frequency and System Clock Frequency
SAMPLING FREQUENCY (kHz) SYSTEM CLOCK FREQUENCY (f
SCLK
) (MHz)
256 f
S
384 f
S
512 f
S
16 4.096 6.144 8.192
32 8.192 12.288 16.384
44.1 11.2896 16.9344 22.5792
48 12.288 18.432 24.576
64 16.384 24.576 32.768
88.2 22.5792 33.8688 45.1584
96 24.576 36.864 49.152
SYMBOL PARAMETER MIN MAX UNIT
t
w(SCKH)
System clock pulse duration, HIGH 8 ns
t
w(SCKL)
System clock pulse duration, LOW 8 ns
Figure 17. System Clock Timing
The PCM1807 has fade-in and fade-out functions on DOUT (pin 9) to avoid pop noise, and the functions come
into operation in some cases as described in several following sections. The level changes from 0 dB to mute or
mute to 0 dB are performed using calculated pseudo S-shaped characteristics with zero-cross detection.
Because of the zero-cross detection, the time needed for the fade in and fade out depends on the analog input
frequency (f
in
). It takes 48/f
in
until processing is completed. If there is no zero cross during 8192/f
S
, DOUT is
faded in or out by force during 48/f
S
(TIME OUT). Figure 18 illustrates the fade-in and fade-out operation
processing.
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