Datasheet

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PCM1804
SLES022C DECEMBER 2001 REVISED OCTOBER 2007
Terminal Functions
TERMINAL
I/O DESCRIPTIONS
NAME PIN
AGND 23 Analog ground
AGNDL 2 Analog ground for V
REF
L
AGNDR 27 Analog ground for V
REF
R
BCK/DSDL 16 I/O Bit clock input/output in PCM mode. L-channel audio data output in DSD mode.
(1)
BYPAS 12 I HPF bypass control. High: HPF disabled, Low: HPF enabled
(1)
DATA/DSDR 15 O L-channel and R-channel audio data output in PCM mode. R-channel audio data output in DSD mode. (DSD
output, when in DSD mode)
DGND 13 Digital ground
FMT0 6 I Audio data format 0. See Table 5 .
(2)
FMT1 7 I Audio data format 1. See Table 5 .
(2)
LRCK/DSDBCK 17 I/O Sampling clock input/output in PCM and DSD modes.
(1)
OSR0 9 I Oversampling ratio 0. See Table 1 and Table 2 .
(2)
OSR1 10 I Oversampling ratio 1. See Table 1 and Table 2 .
(2)
OSR2 11 I Oversampling ratio 2. See Table 1 and Table 2 .
(2)
OVFL 21 O Overflow signal of L-channel in PCM mode. This is available in PCM mode only.
OVFR 20 O Overflow signal of R-channel in PCM mode. This is available in PCM mode only.
RST 19 I Reset, power-down input, active-low
(2)
SCKI 18 I System clock input; 128 f
S
, 256 f
S
, 384 f
S
, 512 f
S
, or 768 f
S
.
(3)
S/ M 8 I Slave/master mode selection. See Table 4 .
(2)
V
CC
22 Analog power supply
V
COM
L 3 L-channel analog common-mode voltage (2.5 V)
V
COM
R 26 R-channel analog common-mode voltage (2.5 V)
V
DD
14 Digital power supply
V
IN
L 5 I L-channel analog input, negative pin
V
IN
L+ 4 I L-channel analog input, positive pin
V
IN
R 24 I R-channel analog input, negative pin
V
IN
R+ 25 I R-channel analog input, positive pin
V
REF
L 1 L-channel voltage reference output, requires capacitors for decoupling to AGND
V
REF
R 28 R-channel voltage reference output, requires capacitors for decoupling to AGND
(1) Schmitt-trigger input
(2) Schmitt-trigger input with internal pulldown (51 k μ typically), 5-V tolerant.
(3) Schmitt-trigger input, 5-V tolerant.
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Product Folder Link(s): PCM1804