Datasheet

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PCM1804
SLES022C DECEMBER 2001 REVISED OCTOBER 2007
Table 1. Oversampling Ratio in Master Mode
OSR2 OSR1 OSR0 OVERSAMPLING RATIO SYSTEM CLOCK RATE
Low Low Low Single rate ( × 128 f
S
) 768 f
S
Low Low High Single rate ( × 128 f
S
) 512 f
S
Low High Low Single rate ( × 128 f
S
) 384 f
S
Low High High Single rate ( × 128 f
S
) 256 f
S
High Low Low Dual rate ( × 64 f
S
) 384 f
S
High Low High Dual rate ( × 64 f
S
) 256 f
S
High High Low Quad rate ( × 32 f
S
) 192 f
S
High High High Quad rate ( × 32 f
S
) 128 f
S
High Low Low DSD mode ( × 64 f
S
) 384 f
S
High Low High DSD mode ( × 64 f
S
) 256 f
S
Table 2. Oversampling Ratio in Slave Mode
OSR2 OSR1 OSR0 OVERSAMPLING RATIO SYSTEM CLOCK RATE
Low Low Low Single rate ( × 128 f
S
) Automatically detected
Low Low High Dual rate ( × 64 f
S
) Automatically detected
Low High Low Quad rate ( × 32 f
S
)
(1)
Automatically detected
Low High High Reserved
High Low Low Reserved
High Low High Reserved
High High Low Reserved
High High High Reserved
(1) Only at the 128-f
S
system clock rate
Table 3. Sampling Frequency and System Clock Frequency
SYSTEM CLOCK FREQUENCY (MHz)
SAMPLING
OVERSAMPLING RATIO
FREQUENCY (kHz)
128 f
S
192 f
S
(1)
256 f
S
384 f
S
512 f
S
768 f
S
32 8.192 12.288 16.384 24.576
Single rate
(2)
44.1 11.2896 16.9344 22.5792 33.8688
48 12.288 18.432 24.576 36.864
88.2 22.5792 33.8688
Dual rate
(3)
96 24.576 36.864
176.4 22.5792 33.8688
Quad rate
(4)
192 24.576 36.864
DSD mode
(3)
44.1 11. 2896 16.9344
(1) Only available in master mode at the quad rate
(2) Modulator is running at 128 f
S
.
(3) Modulator is running at 64 f
S
.
(4) Modulator is running at 32 f
S
.
Copyright © 2001 2007, Texas Instruments Incorporated Submit Documentation Feedback 19
Product Folder Link(s): PCM1804