Datasheet

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APPLICATION INFORMATION
Typical Circuit Connection Diagram
V
IN
L
20
19
18
17
16
15
14
13
12
11
1
2
3
4
5
6
7
8
9
10
PCM1802
V
IN
R
V
REF
1
V
REF
2
V
CC
AGND
PDWN
BYPAS
FSYNC
LRCK
MODE1
DGND
MODE0
FMT1
FMT0
OSR
DOUT
BCK
V
DD
SCKI
+
Oversampling
System Clock
L-Ch IN
R-Ch IN
0 V
5 V
C
4
(2)
C
5
(3)
Power Down
LCF Bypass
Control
+
C
3
(2)
L/R Clock
Frame Sync.
Audio Data
Processor
Mode [1:0]
Format [1:0]
3.3 V
0 V
Data Clock
Data Out
C
1
(1)
C
2
(1)
Control
C
6
(4)
R
1
(5)
S0026-02
+
+
+
+
PCM1802
SLES023C – DECEMBER 2001 – REVISED JANUARY 2005
Figure 29 illustrates a typical circuit connection diagram in which the cutoff frequency of the input HPF is about
8 Hz.
(1) C
1
, C
2
: A 1- µ F capacitor gives 8-Hz ( τ = 1 µ F × 20 k Ω ) cutoff frequency for input HPF in normal operation and
requires a power-on settling time with a 20-ms time constant during the power-on initialization period.
(2) C
3
, C
4
: Bypass capacitors, 0.1- µ F ceramic and 10- µ F tantalum, depending on layout and power supply
(3) C
5
: 0.1- µ F ceramic and 10- µ F tantalum capacitors are recommended.
(4) C
6
: 0.1- µ F ceramic and 10- µ F tantalum capacitors are recommended when using a noisy analog power supply. These
capacitor are not required for a clean analog supply.
(5) R
1
: A 1-k Ω resistor is recommended when using a noisy analog power supply. This resistor is shorted for a clean
analog supply.
Figure 29. Typical Circuit Connection
21