Datasheet

www.ti.com
BCK
FSYNC
LRCK
DOUT
t
(FSSU)
t
(BCKH)
t
(BCKL)
t
(LRHD)
t
(FSHD)
t
(LRCP)
t
(LRSU)
t
(BCKP)
t
(CKDO)
t
(LRDO)
1.4 V
1.4 V
1.4 V
0.5 V
DD
T0017-01
PCM1802
SLES023C – DECEMBER 2001 – REVISED JANUARY 2005
PARAMETER MIN TYP MAX UNIT
t
(BCKP)
BCK period 150 ns
t
(BCKH)
BCK pulse duration, high 60 ns
t
(BCKL)
BCK pulse duration, low 60 ns
t
(LRSU)
LRCK setup time to BCK rising edge 40 ns
t
(LRHD)
LRCK hold time to BCK rising edge 20 ns
t
(LRCP)
LRCK period 10 µ s
t
(FSSU)
FSYNC setup time to BCK rising edge 20 ns
t
(FSHD)
FSYNC hold time to BCK rising edge 20 ns
t
(CKDO)
Delay time, BCK falling edge to DOUT valid –10 20 ns
t
(LRDO)
Delay time, LRCK edge to DOUT valid –10 20 ns
t
r
Rise time of all signals 10 ns
t
f
Fall time of all signals 10 ns
NOTE: Timing measurement reference level is (V
IH
+ V
IL
)/2. Rise and fall times are measured from 10% to 90% of IN/OUT
signal swing. Load capacitance of DOUT is 20 pF.
Figure 25. Audio Data Interface Timing (Slave Mode: FSYNC, LRCK, and BCK Work as Inputs)
17