Datasheet

T0019-01
Reset Ready/Operation
Internal Reset
DOUT
(1)
Zero Data Normal Data
(2)
18436/f
S
Reset Release
Power ON
RSTB ON
1/f
S
32/f
S
Normal Data
(2)
Zero Data
Undefined
Data
Normal Data
SynchronousAsynchronousSynchronous
Resynchronization
Synchronization Lost
DOUT
(1)
State of Synchronization
T0020-01
HPF BYPASS CONTROL
PCM1800
www.ti.com ............................................................................................................................................... SBAS071B – OCTOBER 2000 – REVISED AUGUST 2008
(1) In the master mode, FSYNC, BCK, and LRCK are outputs similar to DOUT.
(2) The HPF transient response (exponentially attenuated signal from ± 0.2% dc of FSR with 200-ms time constant)
appears initially.
Figure 26. ADC Digital Output for Power-On Reset and RSTB Control
(1) Applies only for slave mode — the loss of synchronization never occurs in master mode.
(2) The HPF transient response (exponentially attenuated signal from ± 0.2% dc of FSR with 200-ms time constant)
appears initially.
Figure 27. ADC Digital Output During Loss of Synchronization Resynchronization
The built-in function for dc component rejection can be bypassed by BYPAS (pin 7) control (see Table 4 ). In
bypass mode, the dc component of the input analog signal, the internal dc offset, etc., are also converted and
output in the digital output data.
Table 4. HPF Bypass Control
BYPAS HIGH-PASS FILTER (HPF) MODE
Low Normal (dc cut) mode
High Bypass (through) mode
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