Datasheet

TIMING CHARACTERISTICS
SDA
SCL
t
(BUF)
t
(D-SU)
t
(D-HD)
Start
t
(LOW)
t
(S-HD)
t
(SCL-F)
t
(SCL-R)
t
(HI)
RepeatedStart
t
(RS-SU)
t
(RS-HD)
t
(SDA-F)
t
(SDA-R)
t
(P-SU)
Stop
t
(SP)
TIMING REQUIREMENTS
PCM1795
www.ti.com ........................................................................................................................................................................................................ SLES248 – MAY 2009
Figure 1. Timing Definition on the I
2
C Bus
PARAMETER CONDITIONS MIN MAX UNIT
Standard 100 kHz
f
(SCL)
SCL clock frequency
Fast 400 kHz
Standard 4.7 µ s
t
(BUF)
Bus free time between stop and start conditions
Fast 1.3 µ s
Standard 4.7 µ s
t
(LOW)
Low period of the SCL clock
Fast 1.3 µ s
Standard 4 µ s
t
(HI)
High period of the SCL clock
Fast 600 ns
Standard 4.7 µ s
t
(RS-SU)
Setup time for (repeated) start condition
Fast 600 ns
t
(S-HD)
Standard 4 µ s
Hold time for (repeated) start condition
t
(RS-HD)
Fast 600 ns
Standard 250 ns
t
(D-SU)
Data setup time
Fast 100 ns
Standard 0 900 ns
t
(D-HD)
Data hold time
Fast 0 900 ns
Standard 20 + 0.1 C
B
1000 ns
t
(SCL-R)
Rise time of SCL signal
Fast 20 + 0.1 C
B
300 ns
Standard 20 + 0.1 C
B
1000 ns
Rise time of SCL signal after a repeated start condition
t
(SCL-R1)
and after an acknowledge bit
Fast 20 + 0.1 C
B
300 ns
Standard 20 + 0.1 C
B
1000 ns
t
(SCL-F)
Fall time of SCL signal
Fast 20 + 0.1 C
B
300 ns
Standard 20 + 0.1 C
B
1000 ns
t
(SDA-R)
Rise time of SDA signal
Fast 20 + 0.1 C
B
300 ns
Standard 20 + 0.1 C
B
1000 ns
t
(SDA-F)
Fall time of SDA signal
Fast 20 + 0.1 C
B
300 ns
Standard 4 µ s
t
(P-SU)
Setup time for stop condition
Fast 600 ns
C
(B)
Capacitive load for SDA and SCL line 400 pF
t
(SP)
Pulse duration of suppressed spike Fast 50 ns
Noise margin at high level for each connected device
V
NH
0.2 V
DD
V
(including hysteresis)
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