Datasheet
CommandPacket
LRCK
BCK
DI
DCO1
DCO2
DIDEMD
¼
t
(COE)
BCK
LRCK
DI
DCI
DO
DCO
t
(DS)
t
(BL)
t
(LB)
t
(BCY)
t
(DS)
t
(DOE)
t
(DH)
t
(DH)
PCM1795
SLES248 – MAY 2009 ........................................................................................................................................................................................................
www.ti.com
Figure 73. DCO Output Timing with Skip Operation (for Command Packet 1)
Figure 74. AC Timing of Daisy-Chain Signals
Table 16. Timing Characteristics for Figure 74
PARAMETER MIN MAX UNIT
t
(BCY)
BCK pulse cycle time 20 ns
t
(LB)
LRCK setup time 0 ns
t
(BL)
LRCK hold time 3 ns
t
(DS)
DI setup time 0 ns
t
(DH)
DI hold time 3 ns
t
(DS)
DCI setup time 0 ns
t
(DH)
DCI hold time 3 ns
t
(DOE)
DO output delay
(1)
8 ns
t
(COE)
DCO output delay
(1)
6 ns
(1) Load capacitance is 10 pF.
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