Datasheet
APPLICATION FOR DSD FORMAT (DSD MODE) INTERFACE
BitClock
DSDDecoder
DATA
BCK
SCK
ZEROL
5
6
7
1
2
3
4
ZEROR
MSEL
LRCK
PCM1796
DATA_L
DATA_R
Feature
Pin Assignment When Using DSD Format Interface
PCM1795
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........................................................................................................................................................................................................ SLES248 – MAY 2009
Figure 58 shows a connection diagram for DSD mode.
Figure 58. Connection Diagram in DSD Mode
This mode is used for interfacing directly to a DSD decoder, which is found in Super Audio CD™ (SACD)
applications.
The DSD mode is accessed by programming the following bit in the corresponding control register.
• DSD = 1 (register 20)
The DSD mode provides a low-pass filtering function. The filtering is provided using an analog FIR filter structure.
Four FIR responses are available and are selected by the DMF[1:0] bits of control register 18.
The DSD bit must be set before inputting DSD data; otherwise, the PCM1795 erroneously detects the TDMCA
mode and commands are not accepted through the serial control interface.
Several pins are redefined for DSD mode operation. These include:
• DATA (pin 5): DSDL as left-channel DSD data input
• LRCK (pin 4): DSDR as right-channel DSD data input
• SCK (pin 7): DBCK as bit clock for DSD data
• BCK (pin 6): Set low (N/A)
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Product Folder Link(s): PCM1795